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[Processors]| Friday 6th June 2008 |
The concept of 3D chip stack involves taking chips and memory devices that traditionally sit side-by-side on a silicon wafer and stacking them together on top of one another. According to IBM, this makes the chips more efficient by shortening the distance that information on a chip needs to travel by 1000 times compared to 2D chips.
However, the heat emitted from the chip stacks would be 10 times greater than the heat generated by a hotplate. Given the minute thickness and small area of the chips - plus the additional
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"As we package chips on top of each other to significantly speed a processor's capability to process data, we have found that conventional coolers attached to the back of a chip don't scale. In order to exploit the potential of high-performance 3D chip stacking, we need interlayer cooling," explained Thomas Brunschwiler, project leader at IBM's Zurich Research Laboratory. "Until now, nobody has demonstrated viable solutions to this problem."
Brunschwiler and his team piped water into cooling structures as thin as a human hair between the individual chip layers in order to remove heat efficiently. Using the thermophysical qualities of water, the scientists could demonstrate a cooling performance, which they are hailing a "breakthrough" for this technology.
"With classic backside cooling, the stacking of two or more high-power density logic layers would be impossible," said Bruno Michel, manager of the chip cooling research team at the laboratory.
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