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Intel cuts power on 65nm process

By Steve Malone

Posted on 21 Sep 2005 at 10:52

Intel, the world's biggest chip manufacturer is turning its attention to reducing the power consumption on its new 65nm production process. By improving the design and manufacturing processes at the transistor level, the company says that power leakage from transistors can be reduced by up to 1,000 times.

Heat and power wastage has always been a problem with chip design. As processors have become ever smaller with transistors packed in ever-denser numbers, the amount of heat generated per centimetre has continued to rise. Over the years, various strategies have been tried. Reducing the chip size itself helps, as it requires less power to drive the circuit. Also, various cooling units are used - often many times the size of the processor packaging itself.

However, cooling units are of less use in portable devices like today's notebooks where customers demand performance, extended battery life and portability as well as the new generation of 'blade' servers where ultra thin units are packed into racks in server rooms.

Intel is now focussing on the transistor itself to reduce the heat wastage and has identified three main areas for improvement: sub-threshold leakage where a transistor leaks heat even in the 'off' state, junction leakage between the different semiconductor substances and leakage at the gate oxide, the insulating layer that separates the gate and substrate.

The improvements will be built into the new low power 65nm process under development at Intel. The 65nm process features a new strained silicon technology, eight high-speed copper interconnect layers and a low-k dielectric material and will feature transistors measuring only 35nm in gate length. Intel says that the 65nm processes will double the number of transistors it can build on a single chip above the current 90nm manufacturing.

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