Intel Santa Rosa - processor power management

Posted on 8 May 2007 at 17:39

Intel Santa Rosa - processor power management

Power management has been further refined to keep increased clock speeds from pulling the processors over their TDP ratings.

As well as processor clock speed, for the first time, the FSB speed can be dropped too. More subtle refinements include a system to allow the processor to deep-sleep for longer in the existing Enhanced Deeper Sleep stop-clocked state, by letting the chipset know the processor cache has been flushed so it doesn't need to wake it unnecessarily during 'snoop' cycles.

On the chipset and supporting components side, Intel claims the total power savings across the platform for Santa Rosa can add up to over 2.5W. Almost 1W of that comes from the new but unlikely-to-be-used ability of the wired Ethernet connection to drop its speed to 100Mb/sec while running on battery. Nonetheless, that still represents a saving of over 1W, which in an average notebook can theoretically add around 20 to 30 minutes to the battery life.