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The 64-bit question

Posted on 10 Dec 2002 at 17:57

Software compatibility
To get the full benefit of Intel's 64-bit processor, you need both a 64-bit operating system and applications written and compiled for 64-bit. As well as taking time to achieve (see 64-bit software), this is a big upheaval in a market used to getting faster applications simply by running them, unaltered, on newer hardware.

But the Intel argument for switching to its new architecture leans heavily on how it sees the 64-bit processor being used - a vision not universally shared by its rivals.

Study the Itanium roadmap or read any of the associated white papers and you'll find few references to anything other than servers and technical workstations. On such systems, Intel reasons that the performance benefits of running enhanced 64-bit software, tuned specifically for its IA-64 architecture, outweigh the drawbacks of having to re-write code. It also reasons that sticking with the old x86 architecture would limit further development, as the x86 is unable to take advantage of the parallel processing and other features of the new chip.

That's not how AMD sees it. AMD engineers have based the 64-bit Hammer architecture on an x86 core that can run existing 32-bit applications as quickly, if not faster, than 32-bit chips. Like the existing 32-bit Athlon, Hammer chips feature a RISC processor inside a CISC shell, this time with 64-bit extensions. The x86 instructions are converted into smaller, easier-to-execute RISC operations, enabling the AMD processor to provide a high level of performance with fewer resources than the Itanium. It does have to switch mode when going from 32-bit to 64-bit processing, and vice versa. Whereas with the Itanium that's like booting a completely separate processor, it's no harder for Hammer than for a 32-bit x86 chip, such as a 486 or Pentium, switching into 16-bit operation. Also, because the architecture is x86 based, there should be no degradation in performance when running 32-bit code on the 64-bit AMD chips.

It comes as little surprise, therefore, to find that AMD expects compatibility to be of real importance in the cautious enterprise market. Such customers, it says, make changes gradually, and then only where there's a clear competitive advantage to be gained. AMD hopes the ability to run existing applications faster, with the promise of further software gains later, will be more attractive than having to change both hardware and software horses mid-stream.

The big downside to simply extending the old x86 architecture (the new architecture is unimaginatively referred to as x86-64) is that it isn't so easy to match the kind of parallel and predictive processing possible with IA-64. On the plus side, the first Hammer processors do feature a high degree of parallelism, being able to process up to nine RISC operations (ROPS) at a time. But it can take three or more ROPS to make one CISC instruction, and the AMD silicon also has fewer registers and execution units than the Itanium. This could limit the ability of AMD to compete both in the technical workstation and commercial server markets. However, Hammer does have a technological ace up its sleeve when it comes to multiprocessing.

Intel's approach is the same with the Itanium as with earlier 32-bit processors. Each processor connects to a shared system bus, managed by a dedicated MP chipset. This limits the speed at which processors can access both shared memory and the cache in other chips. With Hammer, both the memory controller and the crossbar switch provided by the MP chipset are built into each AMD processor. Each has its own dedicated memory, plus separate high-bandwidth (HyperTransport) links to the cache and memory associated with the other processors.