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The 64-bit question

Posted on 10 Dec 2002 at 17:57

The speed at which the processor is able to access all that extra memory is of critical concern. It's no good being able to access memory in 64-bit chunks if the interface between processor and RAM slices it up into smaller units for transfer. Indeed, Intel has had to come up with some major improvements on its original 64-bit Itanium - the new Itanium 2 provides a threefold increase in bus bandwidth (see Itanium 2 - this time it's serious).

Other manufacturers claim to still outperform the Itanium in this area. Rival AMD, for example, boasts much better throughput for its 64-bit Hammer architecture using a bus technology called HyperTransport, which it helped develop. It also claims to support easier and more effective scaling in multiprocessing systems, which we'll discuss in more detail, along with actual processor implementations of Hammer technology, later on.

In the meantime, there's also the matter of compatibility. It may not be a problem for some of the older 64-bit RISC designs, such as Compaq's (now HP's) Alpha processor or Sun's UltraSPARC, which run custom Unix software. But it certainly is for Intel, which, for the first time, has departed from the well-established x86 instruction set of its earlier 16- and 32-bit processors in favour of a totally new approach, dubbed IA-64.

Based on a technology it calls EPIC (Explicitly Parallel Instruction Computing), the new Intel architecture is claimed to be good for both high-end technical computing and commercial applications. That's not just because it's 64-bit, but because the design of the chip enables the Intel processor to execute a lot more instructions at the same time - that is, in parallel. An Itanium 2 processor can process up to six instructions simultaneously, with more resources to carry out those instructions than most 32-bit chips and some existing 64-bit designs.

The Itanium 2 has 328 on-board registers plus six integer and two floating-point execution units that can all be run in parallel. Added to this, the processor has a lot of logic dedicated to deciding in advance which instructions can be executed in parallel along with facilities to execute those instructions and transform data ahead of time. Chip and compiler designers refer to this as predictive or speculative processing.

This is good stuff, and the Itanium 2 with its 221 million transistors is an impressive 64-bit CISC (Complex Instruction Set Computer) processor, although it has an Achilles heel - the inability to run existing x86 applications natively.

IA-64 is completely different from x86, aka IA-32. Although it's possible to provide a degree of compatibility by mapping x86 instructions and registers to a subset of the new resources, that's far from enough. Instead, the developers have had to build in a special x86 emulation mode, which has to be 'booted' much like a standalone x86 processor to initialise items such as memory descriptors, registers and flags.

Switching into this mode is a far from trivial process, and potential performance isn't promising. Tests with the first Itanium have put it on a par with a Pentium II when running 32-bit code. So although it's possible to run Windows or DOS programs unchanged - even whole operating systems - these won't run as fast as if they were ported to the newer architecture. Moreover, the Itanium clock speeds are relatively slow compared with the latest Intel Xeon and Pentium 4 chips (1GHz for the first Itanium 2), which could lead many companies to upgrade to the latest 32-bit silicon rather than jump to the Itanium.